Noise as a Computational Resource in Brains and Neuromorphic Hardware (NOICOR)

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Noise as a Computational Resource in Brains and Neuromorphic Hardware (NOICOR)

Olivier Hagnes
Dear all,
Below might be of interest. I am planning for my PhD proposal and comments
would greatly be appreciated.
Best,
Olivier
 
Noise as a Computational Resource in Brains and Neuromorphic
Hardware (NOICOR)
Its working
hypothesis is, that brains employ their inherent stochasticity, apparent in all
brain systems in the form of trial-to-trail variability, as a computational
resource. NOICOR can analyze computational capabilities and learning
capabilities of stochastic dynamic systems in general and of highly structured
brain circuits in particular. It can explore through theoretical analysis and
computer simulations the hypothesis that the knowledge encoded in the brain to
some extent in the form of “embodied” probability distributions over network
states and trajectories of network states, from which networks of neurons
sample through their stochastic dynamics. Previous computational brain models
had focused instead on the elimination of noise in order to support
deterministic computing paradigms.     
Objectives of
NOICOR:
1. to answer
several fundamental theoretical questions as follows,
-- Does a
data-based (rather than constructed) model for a stochastic network of spiking
neurons in the brain also have a stationary distribution p, for which it can
therefore carry out probabilistic inference?
-- Does this
hold in particular also for detailed (and diverse) data-based models for
neurons and synapses, as they are for example reported in the experimental
literature?
--How do
biological details of neurons, synapses, and connectivity patterns affect the
convergence time of these stochastic systems?
-- How can the
overall network activity support a fast generation and readout of network
states y with high probability?
-- How do
changes in network connectivity, synaptic weights, and other network parameters
affect the stationary distribution p that is embodied by the network?
2. to provide a
systematic understand which constraint satisfaction problems (CSPs) can be
solved efficiently by stochastic networks of spiking neurons, and which
dynamical and connectivity properties optimize their convergence speed.
3. to provide a
theoretical framework for understanding temporal aspects of computations in
stochastic networks of spiking neurons. This can provide a theoretical
framework for understanding temporal aspects of computations in stochastic
networks of spiking neurons.
4. to analyze
network learning from the perspective of stochastic computations.
5. to develop
on the basis of theoretical insight gained from work on the preceding
objectives new methods for analyzing simultaneous recording from many neurons
in the cortex, and to develop in collaboration with experimental neuroscientists-
methods for testing predictions of competing models for the organization of
computations in cortical networks of neurons.  This can provide new methods for analyzing the
high dimensional data streams which result from fast 2-photon imaging of
dynamics of Ca in hundreds of neurons, or in dendritic branches of pyramidal
cells, especially in combination with ontogenetic controls. 
6. to develop
principled methods for using noise as a computational resource in neuromorphic
and other novel computing hardware, and to significantly advance the state of
the art with regard to complexity of computational problems that can be solved
by neuromorphic computers. In fact, NOICOR develops principle methods for using
noise as a computational resource in future computing hardware.
This research
can provide a first theoretical foundation for computations in neuromorphic
hardware that uses noise as a computational resource and can design a new
paradigm for solving NP-complete problem through stochastic hardware
approximations, based on insight from work on the second objective. The sixth
objective can mark a drastic departure from the direction of previous research
on the design of future computing hardware.   
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